This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates.
Or split into 4x interest-free payments of 25% on orders over R50
Learn more
This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates.
Imprint | Springer-Verlag |
Country of origin | Germany |
Series | Studies in Computational Intelligence, 81 |
Release date | 2008 |
Availability | Expected to ship within 10 - 15 working days |
First published | 2008 |
Authors | K. Sridharan, Panakala Rajesh Kumar |
Dimensions | 235 x 155 x 15mm (L x W x T) |
Format | Hardcover |
Pages | 139 |
Edition | 2008 ed. |
ISBN-13 | 978-3-540-75393-3 |
Barcode | 9783540753933 |
Categories | |
LSN | 3-540-75393-1 |