New software tools and a sophisticated methodology above RTL are required to answer the challenges of designing an optimized application specific processor (ASIP). This book offers an automated and fully integrated implementation flow and compares it to common implementation practice. Case-studies emphasise that neither the architectural advantages nor the design space of ASIPs are sacrificed for an automated implementation. Realizing a building block which fulfils the requirements on programmability and computational power is now efficiently possible for the first time.
Optimized ASIP Synthesis from Architecture Description Language Models inspires hardware designers as well as application engineers to design powerful ASIPs that will make their SoC designs unique.
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New software tools and a sophisticated methodology above RTL are required to answer the challenges of designing an optimized application specific processor (ASIP). This book offers an automated and fully integrated implementation flow and compares it to common implementation practice. Case-studies emphasise that neither the architectural advantages nor the design space of ASIPs are sacrificed for an automated implementation. Realizing a building block which fulfils the requirements on programmability and computational power is now efficiently possible for the first time.
Optimized ASIP Synthesis from Architecture Description Language Models inspires hardware designers as well as application engineers to design powerful ASIPs that will make their SoC designs unique.
Imprint | Springer-Verlag New York |
Country of origin | United States |
Release date | February 2007 |
Availability | Expected to ship within 10 - 15 working days |
First published | February 2007 |
Authors | Oliver Schliebusch, Heinrich Meyr, Rainer Leupers |
Dimensions | 235 x 155 x 12mm (L x W x T) |
Format | Hardcover |
Pages | 182 |
Edition | 2007 ed. |
ISBN-13 | 978-1-4020-5685-7 |
Barcode | 9781402056857 |
Categories | |
LSN | 1-4020-5685-0 |