Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.
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Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.
Imprint | Springer |
Country of origin | Netherlands |
Release date | November 2010 |
Availability | Expected to ship within 10 - 15 working days |
First published | 2006 |
Authors | Tim Kogel, Rainer Leupers, Heinrich Meyr |
Dimensions | 240 x 160 x 11mm (L x W x T) |
Format | Paperback |
Pages | 186 |
Edition | Softcover reprint of hardcover 1st ed. 2006 |
ISBN-13 | 978-90-481-7202-3 |
Barcode | 9789048172023 |
Categories | |
LSN | 90-481-7202-0 |